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49 " *,!,!-!!) ))!! 7"! )5.!-!!!E,.) 7!!0L+( = #!! "#! ;20;=< =!7>=7=""5 $"" "! $5 ;! (

50 " ".,1 *.) ), 5! 5) 2!, <+ <) <%07* *!<74 * =).+ -! 8 0!<(3,!!, -07* *F07+**F07+B( =! )-*0*) <+ <) =) <%07* *!<74.7!!0L+( -07* *F07+**F07+B( *!" # $ %&'! (!!,!.! *. =" ;@2*(( =O ",?27" =O ;"F" ;;; :E 702= *= 7,2790= )=! +=,02= BA! +A 0EF! HO%8F.(.) %C)X*(N&4E""'..!1! *. 07* *07+**%# &#' %7!C" ; "";"#"" 7"!%((( )**++BC)C* B+() (** +F,%B!G3!!"G("!/> 4 ( >2%07+B("07+B(#!$! #!B"!! "#! 0=!&0='<07+B(=)! (* *<

51 " *.* /!) ). /-)..!1 =E = 43 -? E 0-03? E 3 7= 7=!?,,%V07* *G>%V07+**? V07+**>V3 -!.!1 =E = 43 E E? >VEA -?,E V!.! =E = 43 0<>? ;3!"!""3#&M', ;3!"!""3#&M' ;F ;"F? ;3!"!""3#&M' " 0= 0 =!? >V 0=!330= :? : 0! >!!# "-E? >V"F" A,? 03!,*? 03! &M'""3##;2""; " ""F88 7""" " /-)2-5+! 7$ 7$ 43 *( 7! ;! - 0<>!;F E E ( ;! 3 2 > I 7! ""3#% "!"" 7""" - F88"" - ; - 2 %!/- /)*9 ; # "!! #!B"7C #"!: 0=!>%0=!! 0=!""" ""3# ;! (

52 " 4,!,!*.!E&0L+('! E&*("' -!.!1 ) 0L+(E&#""=)!' 7"!% -!,0.2-5)-5.))94*.; 1 "" o 2 o 920;>?C+(--&--!"!! ""' 1E#0L+(""O920;>?C +(+(&+!' -!,!!,5!)) /!! >%(+"!* ) = 8 *. ;8 + ( ) ;. B -!. /-) <)!&3'..!1) ) 7!*(" 07* *07+**07+B(%# &#' ; "";"#"" 7"!% ((( )**++BC)C* B+()(* * +F,%B!G3!!"G(" /-)92,-.!1; =E =? 0- >V3? - >V (+ *<

53 " ;! (( 035!,!!,)) /!!/ 07* * 07+**F07+B(+#!"- 07+B( 4%0@80@.!".!!#0V(ES 2!"%=)!!&*S'#0@8!0@. 1 0@8!2"

54 " /.!5)>4(*.)!5)5, 2,!)! >3! *+#!)&'*+&' +B#!)&'+B&' 0! * #!)&'*+&' +)#!)&'+B&' ;"" "G;;!!%"3 ;""! EΩ (( >3 2 (2*+G 2+B 9 3 [ ((["#3 #3 [ *(["#3 " 8"#"" 3.3 " :3 """!" (2!!!"# "" ;"" R; F+F * *&0'; 3!)5! 3 : ; %B8"! (- ;+%()8"! *-!"# 3 2 R(- #V!" "?!"!!.,,/ * ;"F! (# ;"F!.7!0L+( Fuse Vext OV ext 1i.24b DI310 The input Leds display the logical state as seen by the central processor Shift register SR Bus to central processor SR : Shift register () "%;.;+!

55 " 2* /.!5)9+!/,!.;>4!5)5, 2,!)! >3! *+#)*+! 0 7# " "#""8" 3.3 " :3 """!" (2!!!"# "" "3 ". : *B8"! C*-.3!"# 2!"! 3!"!!?!"!,!!*)..!,! ;"F! (## ;"F! #.7!0L+( * /%# ;! (

56 ",* /.5)>4*. 5)5, 2,!)! >3! *+ =-" 2 ("B "]^]B,^]^]B,^ E #3 2 R( :3 # RB " (2!!! "#""! "#"" 0"& 8"' R "3%V" ;" : (B8"!#-C -3 " 2 R( &-!!'!" "?!"!"#3!*)..!,! "F! (## "F! #.7!0L+( The output LED displays are updated by the processor + - Fuse Vext OV ext Shift register Lim Lim Command logic Bus to central processor Lim 1o.24b DO ** /245 (B 7! "%!

57 ".* 5)5, 2,!)! 3 *+ " " =-" " 2 7! # )2.* _ 43 """ "! (2!!!"# "" 0"& 8"' R "3% 3V" ;" : (B8! C- -3 " 2 2" &-!!'!" "?!"!"#3 5,*. 2 ` ) #!*)..!,! #" (# #"!! (# #".7 #"!!.7 ;! (C

58 " 2,!)! ;3 " : )8*"8"! *(-?!"!!!5)5, 2,!)! >3! *+#)*+&'! 0! * #)*+&'! ;"" " ;!!%"3 ;""! EΩ (( >3 2 (2*+ ;"! ±(! " " 43 """!" ;"" *&0' "3!" " 5)5, 2,!)! 3 *+ " " =-" 2 23!& V' *2!3!&* _' E 2 R( 0"& 8"' R "3% 3V"!" "! ;"F! (# ;"F!.7 The input LEDs display the logic state as seen by the processor 0V Shift register SR Bus to processor Command logic +V 1i.24b DIO210 SR : Shift register 5. 2 *0.,1),+!.* / 8om3Ab ) ;F%;*

59 "! ).*!./,!!5)>!5)5, 2,!! " 2.*F8* 4 8 %±BC*" 2+,)5!*!,8. ±#:L±4MM5!)?3" 4#"!! 4#" ;""! Ω *+ 3 µ R =-*( [,7 ±*&±)"*( #2 #' " [,7 ±(F A =-3" [,7 ±( " =-" 2 +!!#! ;" : (B8"! C-!" 8!"?!"!!.,,/ * ;"F! (# ;"F!.7!0L+( B 2;2;*2; * * *" Re Protections Multiplexage 0 2" " 8 Re Protections "% 8"!-." """3! 3!3 ;! )

60 "!E)!./ F)!)!!! ).E)>!5)5, 2,!)! ' 80*. ' 80*. ;"3 2!3!3.*(V. *)" 8*(V8 *)".(V. *)" 8(V. *)" ;""! EΩ *?3" 4#"!! 4#" 3 R 4 8 %±BC*" =-*( [ ±*&' " [ ±(F A&' =- [ ±(&' "!" 8!"?!"!! ;" : (B8"! C-! ;"F! (## ;"F! #.7!0L+( B 2;2;*2; * B* * *" Protections Multiplexage 0 2" " 8 Protections 3!#"!"&'!D -!% B3*!&(3"'%±( B3!&"'%±* ;## 3! "%3 ""!8" 3 ""!.""""33!3 )* 5 $5%2;.2;*

61 "!./(,!5)> 5)5, 2,!)! " 2 +F* 4!VF8*+B" Ω -&*+'G)(-&*+.["#' 3! µ )(- 743 µ2 B =- [ ± &,' 3.3 " 43 """ "! (2!!!"# "" ;" : B8"! - "B 2 *28B-*2-*+!!" "?!"!!!*)..!,! "!! (## 4#"!! #.7!0L+( +24VDC 1 0V 2 Shift register + output 0 - I U +Vcc A -Vcc N Bus to central processor + output 7-8o.c1b AO ** /2!,!59'#,0; ;! )

62 "!./8./5)> 5)5, 2,!! "3! "!3.. *)" 88 *)" 4 8 %±*+B" "# 17!"! Ω `* 3! µ ( 743 +BB =-3" [ ±*&' " ;"!3.3 " ;" : B8"!8("" ))-!" "?!"!!! 4#"!! (## 4#"!! #.7!0L+( 1 The display leds are updated by the processor 2 +Vcc Shift register + output 0 - -Vcc A N Convertor N/A 12 bits Bus to central processor + output 7-8o.v1b 8o.v1s AO ** /2!8./59'#80D'#8); )+ 2 3 "%2*

63 %!!5)5, 2,!! =-"!#3 2.*2. *)" 8*28 *)" ;""! Ω *+ =./!5)5, 2,!) =-"3!#3.. *)" 88 *)" ;""! Ω *E!)5, 2,!) 055$ 4 (8 3# 7!!83# 2 3 µ R*( &'%*( F)N [ ±F±*!!# 2 +!!" " %!5)5, 2,!) "!#3 2 "+2 8 *)"*2!"! Ω -&"#V*+' )(-&"#V*+.[' """ *+- =./5)5, 2,!) "3!#3. *)". 8 *)"8!"! Ω `!5)5, 2,!)! 4 8 %±*+B" "# 23 µ =-*( F8)N [ ±*F± " 3.3! =-"+ 2!-*+"#""!"!@)5, 2,!)! ;" : (:"#3!!!*:#+"-!&EΩ'?!"!!!*)..!,!"F! (##!"F! (##!"."F ;! )(

64 " +24VDC 1 0V 2 Shift register + output 0 - I U +Vcc A -Vcc N DAC 12 bits Bus to central processo + output 3-4o.c1b AIO320 (4 channels) 5. 2 ** /2!,!59(#,0; The display Leds are updated by the processor 1 2 +Vcc Shift register + output 0 - -Vcc A N DAC 12 bits Bus to central processo + output 3-4o.v1b AIO320 (4 channels) 5. 2 ** /2!8./59(#80; )) 2!3 ;F%2; *

65 " )!)!5)>4!5)5, 2,!)! >" B " *! #&! ;('!@5)!* )2+8. 3G:L35!) A43G:LA435!) ="#X N (##! 8*(N # " &#3' #! " &#' 3# ;" : *:&# "'!" " 3#!2# Registre à décalage V+ sonde PT100 3 fils m source de courant module C3 U signal G U Réf A N Bus vers processeur central sonde PT100 3 fils m source de courant MUX réf ampli V- AIO320(8 voies pour sondes PT100) ;! )

66 ",** /.!5)>4 ;!% 3"!!! #" 4E)! "& ' "#"""%*+3+B*&# '!=!5)5, 2,!)! >3! *+ +B * 0!.*[8([3 ;"" "G;;!!%"3 ;" 2 **+G(+BG(* 7#F [ 9 3V((["#3 #3V*(["#3 " 8"#"" 3.3 " :3 """!" ;"" (&0' "3 "3 :!" "?!"!!!%;"F! (# " N +(- 1/4 carte bornier carte fonction I1 Vint - Réf + lecture I1 Sérialisation 0Vint - Réf + lecture /I1 0Vint Vint I2 0Vint - Réf + lecture I2 Bus 0Vint - Réf + lecture /I2 Gestion Bus Commun si alimentation 24V Commun si alimentation 48V commun si alimentation 120V Visualisations )B 7!! "%;

67 ",** ;!% 3"!!! #" 9!%+"!+"! 0!!"! ;E"!!!3:?!5)5, 2,!)! >3! *+F+BF*G.*[8([ ;" 2 **+(+B!* 7#F [ 9 3V((["#3 #3V*(["#3 ;"" (!" 2 " 5)5, 2,!) 0%" 4!% =E EF4E.4E"# :!3!#F0V+ &*2 #'.3 *&3"#""'. 2 * 0%0*0+0)0B =EFE 0%00 0(0 E /!. )!) 00*0+0)0B (0 +! 7777! +!" :! 0! : %>.!&*'# <3.<#! :! 1/2 carte bornier carte fonction +V R1 Wdg général Wdg local états Sérialisation Bobine relais Commande 1 état 1 +V état 2 cdes R2 Commande 2 0V Vint I1 0Vint Réf + - lecture contact I1 Bus I2 Gestion Bus Commun si alimentation 24V Commun si alim entation 48V commun si alimentation 120V Visualisations 1 organe = 1/2 carte bornier = 10 bornes ;! )C